1. Technical Field
This invention relates generally to a method for forming high density electrical circuit features on a nonconductive substrate surface, and more particularly to such a method that prevents catalytic seed material from being deposited on non-circuit surfaces of the substrate.
2. Background Art
A widely used method for forming finely defined electrical circuit features on a substrate includes seeding the surface of the substrate with a catalytic material that promotes the formation of conductive metal plating on desired portions of the substrate where individual leads and pads are defined. Those surfaces are then plated with an electrically conductive material such as copper to define the circuit features, followed by deposition of a thin precious metal coating on the copper base. This process is generally known as the fully additive process due to the additive formation of conductive circuit features directly on the nonconductive surface. A thin layer of precious metal is required to protect the copper from corrosion and improve surface wetability for subsequent solder connections. The thin precious metal plating process is generally referred to as conformal plating because the thin layer follows each surface contour of the underlying copper conductor. Typically, nickel is first deposited on the copper, and then gold deposited over the nickel, both preferably by electroless processes.
The fully additive process is often used to build the precise geometries found in large-scale integrated (LSI) components. Typically, the spaces between wire bond fingers may be as small as 2.5 mils or less. Desirably, all of the exposed copper elements of the circuit are plated with electroless nickel and gold, especially the wire bond pads. The fully additive process, which forms the copper circuit features directly onto a substrate surface, relies on having a palladium seed deposited on the surface to be plated, which promotes the formation of copper on that particular surface. If the palladium seed is not removed prior to the nickel/gold plating over the copper, gold will deposit on the substrate and form shorts between the conductive features of the electrical circuit. It is very difficult to remove the palladium seed layer from between the narrow spaces separating the circuit features. A galvanic cell is formed between the palladium seed and copper, which causes seed removal solutions, such as cyanide, to attack the copper in preference to the palladium.
The above problem becomes even worse if the component requires chemical hole cleaning (CHC). Thicker cross-sections, such as 2S2P (two signal, two power planes) and greater, require chemical hole cleaning to assure subsequent plating of the hole. Bridging of the circuit features by the subsequent deposition of nickel and gold is exacerbated by the CHC process, to the extent that there is presently no manufacturable conformal electroless precious metal plating process for CHC parts.
The present invention is directed to overcoming the problems set forth above. It is desirable to have a method of depositing palladium seeder material on the desired circuit feature portions of a substrate without requiring the removal of seed from the non-circuit areas of the substrate prior to conformal plating, as presently practiced. It is also desirable to have such a method that is economical, adaptable to high production processes, and provides a consistently high quality component ready for the conformal plating of precious metal on defined copper circuit features.